churilov.dev
Embedded firmware engineer

Vladislav Churilov.

Software for real hardware.

I build C/C++ firmware for embedded systems. My service firmware runs in 400+ ARKA CPR devices used in ambulances and hospitals.

400+ARKA CPR devices running my service firmware
C / C++Embedded systems & multi-MCU firmware
M.Sc.Instrumentation engineering, with distinction
01 / About

From firmware to the tools
that help ship it.

I’m an embedded firmware engineer working across microcontrollers, communication protocols, and production tooling. My experience includes medical devices, FreeRTOS, bare-metal state machines, and systems where several controllers need to work together.

I also build the infrastructure around the firmware: update utilities, automated test stands, host-side tests, and CI pipelines. I care about making systems easier to inspect, verify, and maintain.

Languages & platforms

C, C++, Rust utilities, Python scripting.
STM32, ESP32 / ESP-IDF, CH32 / RISC-V.

Architecture & interfaces

FreeRTOS, cooperative scheduling, FSMs.
UART, SPI, I²C, USB, Modbus, Wi-Fi, WebSocket.

Verification & workflow

Host-side tests, on-target measurements, code review, GitLab CI, cppcheck, clang-tidy.

Hardware & debugging

Prototype PCB design, oscilloscopes, logic analyzers, ST-Link and WCH-Link.

02 / Selected work

From deployed firmware to open source.

Commercial product / Medical devicesFirmware contributor

ARKA CPR Device

I developed the complete ESP32 service firmware for the ARKA CPR Device, with 400+ units deployed in ambulances and hospitals. My contribution covers configuration, diagnostics, data export, and multi-controller firmware updates.

  • Device servicing over local Wi-Fi. Built a password-protected interface for configuration, testing, file export, and firmware updates with post-write flash readback verification.
  • Communication across controllers. Designed an asynchronous point-to-point protocol and portable serialization library with CRC-16 and versioning, used by three device controllers and a test-stand controller.
  • Startup without file-count overhead. Replaced directory-scanning exFAT and blocking FatFs code with an append-only filesystem and a non-blocking state-machine library, eliminating the increase in startup time as the number of stored files grows.
  • One file, multiple controllers. Created a binary update package that combines compatible firmware for multiple MCUs, allowing the controllers to be updated from a single file. Added header CRC-16 and whole-file CRC-32 checks; packages are also about 50% smaller than equivalent Intel HEX files.
C / C++ · ESP32 · FreeRTOS · Multi-MCU · Wi-Fi · Verification
Open source / Active developmentCreator & maintainer

uSliceCore

A small cooperative scheduler for C++17 firmware on 32-bit microcontrollers. I created it to give a growing bare-metal superloop explicit task lifecycles, state machines, and timers while keeping execution serialized and easy to follow.

  • One loop, one stack. Short, non-blocking task steps with explicit entry, loop, and stop handlers; no preemption, per-task stacks, or dynamic allocation in the scheduler and time core.
  • Defined lifecycle behavior. Task registration, startup, deferred cleanup, task handover, and rollover-safe tick timers.
  • Verification alongside implementation. Host-side tests, CI, static analysis, and compile-time task-layout checks for ARM EABI, RV32IMAC, and RV32EC.

The project is in active development. Timing bounds require measurement and analysis on the actual target; they are not a verified project guarantee.

Explore the repository
C++17 · Bare metal · Cooperative scheduling · FSM · Host-side tests
03 / Experience

Engineering beyond the main loop.

Embedded systems engineering

Firmware, multi-MCU protocols, and service tooling for the ARKA CPR Device. Led two manufacturing test-stand projects covering automated measurements and per-unit acceptance reports; designed the CPR test stand’s PCB and firmware and coordinated PC application development.

Set up a self-hosted GitLab server, source migration, backups, merge-request rules, and CI.

Experience contributing to requirements, verification protocols, traceability, and risk-control documentation within IEC 62304 and ISO 14971 processes.

Hardware & digital logic

Implemented Verilog/SystemVerilog logic for Altera MAX II CPLDs, programmed and checked devices on hardware, and assembled prototype PCBs.

04 / Education

Instrumentation engineering.

2023–2025

Master of Science

Instrumentation Engineering

MIREA — Russian Technological University

Graduated with distinction

2019–2023

Bachelor of Science

Instrumentation Engineering

MIREA — Russian Technological University

Graduated with distinction

05 / Get in touch

Let’s talk embedded systems.

For engineering opportunities, project discussions, or questions about my work.

Open to relocation to Germany · English B2 · Russian native · Learning German